| 2850 |
dpurdie |
1 |
/******************************************************************************/
|
|
|
2 |
/* Legacy Linker Command File */
|
|
|
3 |
/* Not recommended for use in new projects. */
|
|
|
4 |
/* Please use the device specific cmd file */
|
|
|
5 |
/******************************************************************************/
|
|
|
6 |
|
|
|
7 |
/******************************************************************************/
|
|
|
8 |
/* msp430f4270.cmd */
|
|
|
9 |
/* - Linker Command File for defintions in the header file */
|
|
|
10 |
/* Please do not change ! */
|
|
|
11 |
/* */
|
|
|
12 |
/******************************************************************************/
|
|
|
13 |
|
|
|
14 |
|
|
|
15 |
/************************************************************
|
|
|
16 |
* STANDARD BITS
|
|
|
17 |
************************************************************/
|
|
|
18 |
/************************************************************
|
|
|
19 |
* STATUS REGISTER BITS
|
|
|
20 |
************************************************************/
|
|
|
21 |
/************************************************************
|
|
|
22 |
* PERIPHERAL FILE MAP
|
|
|
23 |
************************************************************/
|
|
|
24 |
/************************************************************
|
|
|
25 |
* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS
|
|
|
26 |
************************************************************/
|
|
|
27 |
IE1 = 0x0000;
|
|
|
28 |
IFG1 = 0x0002;
|
|
|
29 |
IE2 = 0x0001;
|
|
|
30 |
IFG2 = 0x0003;
|
|
|
31 |
/************************************************************
|
|
|
32 |
* WATCHDOG TIMER
|
|
|
33 |
************************************************************/
|
|
|
34 |
WDTCTL = 0x0120;
|
|
|
35 |
/************************************************************
|
|
|
36 |
* DIGITAL I/O Port1/2
|
|
|
37 |
************************************************************/
|
|
|
38 |
P1IN = 0x0020;
|
|
|
39 |
P1OUT = 0x0021;
|
|
|
40 |
P1DIR = 0x0022;
|
|
|
41 |
P1IFG = 0x0023;
|
|
|
42 |
P1IES = 0x0024;
|
|
|
43 |
P1IE = 0x0025;
|
|
|
44 |
P1SEL = 0x0026;
|
|
|
45 |
P2IN = 0x0028;
|
|
|
46 |
P2OUT = 0x0029;
|
|
|
47 |
P2DIR = 0x002A;
|
|
|
48 |
P2IFG = 0x002B;
|
|
|
49 |
P2IES = 0x002C;
|
|
|
50 |
P2IE = 0x002D;
|
|
|
51 |
P2SEL = 0x002E;
|
|
|
52 |
/************************************************************
|
|
|
53 |
* DIGITAL I/O Port5/6
|
|
|
54 |
************************************************************/
|
|
|
55 |
P5IN = 0x0030;
|
|
|
56 |
P5OUT = 0x0031;
|
|
|
57 |
P5DIR = 0x0032;
|
|
|
58 |
P5SEL = 0x0033;
|
|
|
59 |
P6IN = 0x0034;
|
|
|
60 |
P6OUT = 0x0035;
|
|
|
61 |
P6DIR = 0x0036;
|
|
|
62 |
P6SEL = 0x0037;
|
|
|
63 |
/************************************************************
|
|
|
64 |
* BASIC TIMER
|
|
|
65 |
************************************************************/
|
|
|
66 |
BTCTL = 0x0040;
|
|
|
67 |
BTCNT1 = 0x0046;
|
|
|
68 |
BTCNT2 = 0x0047;
|
|
|
69 |
/************************************************************
|
|
|
70 |
* SYSTEM CLOCK, FLL+ (x41x)
|
|
|
71 |
************************************************************/
|
|
|
72 |
SCFI0 = 0x0050;
|
|
|
73 |
SCFI1 = 0x0051;
|
|
|
74 |
SCFQCTL = 0x0052;
|
|
|
75 |
FLL_CTL0 = 0x0053;
|
|
|
76 |
FLL_CTL1 = 0x0054;
|
|
|
77 |
/************************************************************
|
|
|
78 |
* LCD_A
|
|
|
79 |
************************************************************/
|
|
|
80 |
LCDACTL = 0x0090;
|
|
|
81 |
LCDAPCTL0 = 0x00AC;
|
|
|
82 |
LCDAPCTL1 = 0x00AD;
|
|
|
83 |
LCDAVCTL0 = 0x00AE;
|
|
|
84 |
LCDAVCTL1 = 0x00AF;
|
|
|
85 |
LCDM1 = 0x0091;
|
|
|
86 |
LCDM2 = 0x0092;
|
|
|
87 |
LCDM3 = 0x0093;
|
|
|
88 |
LCDM4 = 0x0094;
|
|
|
89 |
LCDM5 = 0x0095;
|
|
|
90 |
LCDM6 = 0x0096;
|
|
|
91 |
LCDM7 = 0x0097;
|
|
|
92 |
LCDM8 = 0x0098;
|
|
|
93 |
LCDM9 = 0x0099;
|
|
|
94 |
LCDM10 = 0x009A;
|
|
|
95 |
LCDM11 = 0x009B;
|
|
|
96 |
LCDM12 = 0x009C;
|
|
|
97 |
LCDM13 = 0x009D;
|
|
|
98 |
LCDM14 = 0x009E;
|
|
|
99 |
LCDM15 = 0x009F;
|
|
|
100 |
LCDM16 = 0x00A0;
|
|
|
101 |
LCDM17 = 0x00A1;
|
|
|
102 |
LCDM18 = 0x00A2;
|
|
|
103 |
LCDM19 = 0x00A3;
|
|
|
104 |
LCDM20 = 0x00A4;
|
|
|
105 |
/************************************************************
|
|
|
106 |
* Timer A3
|
|
|
107 |
************************************************************/
|
|
|
108 |
TAIV = 0x012E;
|
|
|
109 |
TACTL = 0x0160;
|
|
|
110 |
TACCTL0 = 0x0162;
|
|
|
111 |
TACCTL1 = 0x0164;
|
|
|
112 |
TACCTL2 = 0x0166;
|
|
|
113 |
TAR = 0x0170;
|
|
|
114 |
TACCR0 = 0x0172;
|
|
|
115 |
TACCR1 = 0x0174;
|
|
|
116 |
TACCR2 = 0x0176;
|
|
|
117 |
/*************************************************************
|
|
|
118 |
* Flash Memory
|
|
|
119 |
*************************************************************/
|
|
|
120 |
FCTL1 = 0x0128;
|
|
|
121 |
FCTL2 = 0x012A;
|
|
|
122 |
FCTL3 = 0x012C;
|
|
|
123 |
/************************************************************
|
|
|
124 |
* SD16_A1 - Sigma Delta 16 Bit
|
|
|
125 |
************************************************************/
|
|
|
126 |
SD16INCTL0 = 0x00B0;
|
|
|
127 |
SD16AE = 0x00B7;
|
|
|
128 |
SD16CONF0 = 0x00F7;
|
|
|
129 |
SD16CONF1 = 0x00BF;
|
|
|
130 |
/* Please use only the recommended settings */
|
|
|
131 |
SD16CTL = 0x0100;
|
|
|
132 |
SD16CCTL0 = 0x0102;
|
|
|
133 |
SD16IV = 0x0110;
|
|
|
134 |
SD16MEM0 = 0x0112;
|
|
|
135 |
/************************************************************
|
|
|
136 |
* DAC12
|
|
|
137 |
************************************************************/
|
|
|
138 |
DAC12_0CTL = 0x01C0;
|
|
|
139 |
DAC12_0DAT = 0x01C8;
|
|
|
140 |
/************************************************************
|
|
|
141 |
* Interrupt Vectors (offset from 0xFFE0)
|
|
|
142 |
************************************************************/
|
|
|
143 |
/************************************************************
|
|
|
144 |
* End of Modules
|
|
|
145 |
************************************************************/
|