| 2850 |
dpurdie |
1 |
/******************************************************************************/
|
|
|
2 |
/* Legacy Linker Command File */
|
|
|
3 |
/* Not recommended for use in new projects. */
|
|
|
4 |
/* Please use the device specific cmd file */
|
|
|
5 |
/******************************************************************************/
|
|
|
6 |
|
|
|
7 |
/******************************************************************************/
|
|
|
8 |
/* msp430p325.cmd */
|
|
|
9 |
/* - Linker Command File for defintions in the header file */
|
|
|
10 |
/* Please do not change ! */
|
|
|
11 |
/* */
|
|
|
12 |
/******************************************************************************/
|
|
|
13 |
|
|
|
14 |
|
|
|
15 |
/************************************************************
|
|
|
16 |
* STANDARD BITS
|
|
|
17 |
************************************************************/
|
|
|
18 |
/************************************************************
|
|
|
19 |
* STATUS REGISTER BITS
|
|
|
20 |
************************************************************/
|
|
|
21 |
/************************************************************
|
|
|
22 |
* PERIPHERAL FILE MAP
|
|
|
23 |
************************************************************/
|
|
|
24 |
/************************************************************
|
|
|
25 |
* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS
|
|
|
26 |
************************************************************/
|
|
|
27 |
IE1 = 0x0000;
|
|
|
28 |
IFG1 = 0x0002;
|
|
|
29 |
IE2 = 0x0001;
|
|
|
30 |
IFG2 = 0x0003;
|
|
|
31 |
/************************************************************
|
|
|
32 |
* WATCHDOG TIMER
|
|
|
33 |
************************************************************/
|
|
|
34 |
WDTCTL = 0x0120;
|
|
|
35 |
/************************************************************
|
|
|
36 |
* DIGITAL I/O PORT0
|
|
|
37 |
************************************************************/
|
|
|
38 |
P0IN = 0x0010;
|
|
|
39 |
P0OUT = 0x0011;
|
|
|
40 |
P0DIR = 0x0012;
|
|
|
41 |
P0IFG = 0x0013;
|
|
|
42 |
P0IES = 0x0014;
|
|
|
43 |
P0IE = 0x0015;
|
|
|
44 |
/************************************************************
|
|
|
45 |
* LCD REGISTER
|
|
|
46 |
************************************************************/
|
|
|
47 |
LCDCTL = 0x0030;
|
|
|
48 |
LCDM1 = 0x0031;
|
|
|
49 |
LCDM2 = 0x0032;
|
|
|
50 |
LCDM3 = 0x0033;
|
|
|
51 |
LCDM4 = 0x0034;
|
|
|
52 |
LCDM5 = 0x0035;
|
|
|
53 |
LCDM6 = 0x0036;
|
|
|
54 |
LCDM7 = 0x0037;
|
|
|
55 |
LCDM8 = 0x0038;
|
|
|
56 |
LCDM9 = 0x0039;
|
|
|
57 |
LCDM10 = 0x003A;
|
|
|
58 |
LCDM11 = 0x003B;
|
|
|
59 |
LCDM12 = 0x003C;
|
|
|
60 |
LCDM13 = 0x003D;
|
|
|
61 |
LCDM14 = 0x003E;
|
|
|
62 |
LCDM15 = 0x003F;
|
|
|
63 |
/************************************************************
|
|
|
64 |
* BASIC TIMER
|
|
|
65 |
************************************************************/
|
|
|
66 |
BTCTL = 0x0040;
|
|
|
67 |
BTCNT1 = 0x0046;
|
|
|
68 |
BTCNT2 = 0x0047;
|
|
|
69 |
/************************************************************
|
|
|
70 |
* SYSTEM CLOCK GENERATOR
|
|
|
71 |
************************************************************/
|
|
|
72 |
SCFI0 = 0x0050;
|
|
|
73 |
SCFI1 = 0x0051;
|
|
|
74 |
SCFQCTL = 0x0052;
|
|
|
75 |
CBCTL = 0x0053;
|
|
|
76 |
/************************************************************
|
|
|
77 |
* 8BIT TIMER/COUNTER
|
|
|
78 |
************************************************************/
|
|
|
79 |
TCCTL = 0x0042;
|
|
|
80 |
TCPLD = 0x0043;
|
|
|
81 |
TCDAT = 0x0044;
|
|
|
82 |
/************************************************************
|
|
|
83 |
* TIMER/PORT
|
|
|
84 |
************************************************************/
|
|
|
85 |
TPCTL = 0x004B;
|
|
|
86 |
TPCNT1 = 0x004C;
|
|
|
87 |
TPCNT2 = 0x004D;
|
|
|
88 |
TPD = 0x004E;
|
|
|
89 |
TPE = 0x004F;
|
|
|
90 |
/* Source select of clock input coded with Bits 6-7 in TPE
|
|
|
91 |
NOTE: If the control bit B16 in TPD is set, TPSSEL2/3
|
|
|
92 |
are 'don't care' and the clock source of counter
|
|
|
93 |
TPCNT2 is the same as of the counter TPCNT1. */
|
|
|
94 |
/************************************************************
|
|
|
95 |
* A/D CONVERTER 12 + 2
|
|
|
96 |
************************************************************/
|
|
|
97 |
AIN = 0x0110;
|
|
|
98 |
AEN = 0x0112;
|
|
|
99 |
ACTL = 0x0114;
|
|
|
100 |
ADAT = 0x0118;
|
|
|
101 |
/************************************************************
|
|
|
102 |
* EPROM CONTROL
|
|
|
103 |
************************************************************/
|
|
|
104 |
EPCTL = 0x0054;
|
|
|
105 |
/************************************************************
|
|
|
106 |
* Interrupt Vectors (offset from 0xFFE0)
|
|
|
107 |
************************************************************/
|
|
|
108 |
/************************************************************
|
|
|
109 |
* End of Modules
|
|
|
110 |
************************************************************/
|