WebSVN – DevTools – Blame – /TexasInstrumentsMsp430/trunk/src/ccsv4/msp430/include/msp430fr5738.cmd

Rev	Author	Line No.	Line
2850	dpurdie	1	`/******************************************************************************/`
		2	`/* msp430fr5738.cmd */`
		3	`/* - Linker Command File for defintions in the header file */`
		4	`/* Please do not change ! */`
		5	`/* */`
		6	`/******************************************************************************/`
		7
		8
		9	`/************************************************************`
		10	`* STANDARD BITS`
		11	`************************************************************/`
		12	`/************************************************************`
		13	`* STATUS REGISTER BITS`
		14	`************************************************************/`
		15	`/************************************************************`
		16	`* CPU`
		17	`************************************************************/`
		18	`/************************************************************`
		19	`* PERIPHERAL FILE MAP`
		20	`************************************************************/`
		21	`/************************************************************`
		22	`* ADC10_B`
		23	`************************************************************/`
		24	`ADC10CTL0 = 0x0700;`
		25	`ADC10CTL0_L = 0x0700;`
		26	`ADC10CTL0_H = 0x0701;`
		27	`ADC10CTL1 = 0x0702;`
		28	`ADC10CTL1_L = 0x0702;`
		29	`ADC10CTL1_H = 0x0703;`
		30	`ADC10CTL2 = 0x0704;`
		31	`ADC10CTL2_L = 0x0704;`
		32	`ADC10CTL2_H = 0x0705;`
		33	`ADC10LO = 0x0706;`
		34	`ADC10LO_L = 0x0706;`
		35	`ADC10LO_H = 0x0707;`
		36	`ADC10HI = 0x0708;`
		37	`ADC10HI_L = 0x0708;`
		38	`ADC10HI_H = 0x0709;`
		39	`ADC10MCTL0 = 0x070A;`
		40	`ADC10MCTL0_L = 0x070A;`
		41	`ADC10MCTL0_H = 0x070B;`
		42	`ADC10MEM0 = 0x0712;`
		43	`ADC10MEM0_L = 0x0712;`
		44	`ADC10MEM0_H = 0x0713;`
		45	`ADC10IE = 0x071A;`
		46	`ADC10IE_L = 0x071A;`
		47	`ADC10IE_H = 0x071B;`
		48	`ADC10IFG = 0x071C;`
		49	`ADC10IFG_L = 0x071C;`
		50	`ADC10IFG_H = 0x071D;`
		51	`ADC10IV = 0x071E;`
		52	`ADC10IV_L = 0x071E;`
		53	`ADC10IV_H = 0x071F;`
		54	`/************************************************************`
		55	`* CLOCK SYSTEM`
		56	`************************************************************/`
		57	`CSCTL0 = 0x0160;`
		58	`CSCTL0_L = 0x0160;`
		59	`CSCTL0_H = 0x0161;`
		60	`CSCTL1 = 0x0162;`
		61	`CSCTL1_L = 0x0162;`
		62	`CSCTL1_H = 0x0163;`
		63	`CSCTL2 = 0x0164;`
		64	`CSCTL2_L = 0x0164;`
		65	`CSCTL2_H = 0x0165;`
		66	`CSCTL3 = 0x0166;`
		67	`CSCTL3_L = 0x0166;`
		68	`CSCTL3_H = 0x0167;`
		69	`CSCTL4 = 0x0168;`
		70	`CSCTL4_L = 0x0168;`
		71	`CSCTL4_H = 0x0169;`
		72	`CSCTL5 = 0x016A;`
		73	`CSCTL5_L = 0x016A;`
		74	`CSCTL5_H = 0x016B;`
		75	`CSCTL6 = 0x016C;`
		76	`CSCTL6_L = 0x016C;`
		77	`CSCTL6_H = 0x016D;`
		78	`/************************************************************`
		79	`* Comparator D`
		80	`************************************************************/`
		81	`CDCTL0 = 0x08C0;`
		82	`CDCTL0_L = 0x08C0;`
		83	`CDCTL0_H = 0x08C1;`
		84	`CDCTL1 = 0x08C2;`
		85	`CDCTL1_L = 0x08C2;`
		86	`CDCTL1_H = 0x08C3;`
		87	`CDCTL2 = 0x08C4;`
		88	`CDCTL2_L = 0x08C4;`
		89	`CDCTL2_H = 0x08C5;`
		90	`CDCTL3 = 0x08C6;`
		91	`CDCTL3_L = 0x08C6;`
		92	`CDCTL3_H = 0x08C7;`
		93	`CDINT = 0x08CC;`
		94	`CDINT_L = 0x08CC;`
		95	`CDINT_H = 0x08CD;`
		96	`CDIV = 0x08CE;`
		97	`CDIV_L = 0x08CE;`
		98	`CDIV_H = 0x08CF;`
		99	`/*************************************************************`
		100	`* CRC Module`
		101	`*************************************************************/`
		102	`CRCDI = 0x0150;`
		103	`CRCDI_L = 0x0150;`
		104	`CRCDI_H = 0x0151;`
		105	`CRCDIRB = 0x0152;`
		106	`CRCDIRB_L = 0x0152;`
		107	`CRCDIRB_H = 0x0153;`
		108	`CRCINIRES = 0x0154;`
		109	`CRCINIRES_L = 0x0154;`
		110	`CRCINIRES_H = 0x0155;`
		111	`CRCRESR = 0x0156;`
		112	`CRCRESR_L = 0x0156;`
		113	`CRCRESR_H = 0x0157;`
		114	`/************************************************************`
		115	`* DMA_X`
		116	`************************************************************/`
		117	`DMACTL0 = 0x0500;`
		118	`DMACTL0_L = 0x0500;`
		119	`DMACTL0_H = 0x0501;`
		120	`DMACTL1 = 0x0502;`
		121	`DMACTL1_L = 0x0502;`
		122	`DMACTL1_H = 0x0503;`
		123	`DMACTL2 = 0x0504;`
		124	`DMACTL2_L = 0x0504;`
		125	`DMACTL2_H = 0x0505;`
		126	`DMACTL3 = 0x0506;`
		127	`DMACTL3_L = 0x0506;`
		128	`DMACTL3_H = 0x0507;`
		129	`DMACTL4 = 0x0508;`
		130	`DMACTL4_L = 0x0508;`
		131	`DMACTL4_H = 0x0509;`
		132	`DMAIV = 0x050E;`
		133	`DMAIV_L = 0x050E;`
		134	`DMAIV_H = 0x050F;`
		135	`DMA0CTL = 0x0510;`
		136	`DMA0CTL_L = 0x0510;`
		137	`DMA0CTL_H = 0x0511;`
		138	`DMA0SA = 0x0512;`
		139	`DMA0SAL = 0x0512;`
		140	`DMA0DA = 0x0516;`
		141	`DMA0DAL = 0x0516;`
		142	`DMA0SZ = 0x051A;`
		143	`DMA1CTL = 0x0520;`
		144	`DMA1CTL_L = 0x0520;`
		145	`DMA1CTL_H = 0x0521;`
		146	`DMA1SA = 0x0522;`
		147	`DMA1SAL = 0x0522;`
		148	`DMA1DA = 0x0526;`
		149	`DMA1DAL = 0x0526;`
		150	`DMA1SZ = 0x052A;`
		151	`DMA2CTL = 0x0530;`
		152	`DMA2CTL_L = 0x0530;`
		153	`DMA2CTL_H = 0x0531;`
		154	`DMA2SA = 0x0532;`
		155	`DMA2SAL = 0x0532;`
		156	`DMA2DA = 0x0536;`
		157	`DMA2DAL = 0x0536;`
		158	`DMA2SZ = 0x053A;`
		159	`/*************************************************************`
		160	`* FRAM Memory`
		161	`*************************************************************/`
		162	`FRCTL0 = 0x0140;`
		163	`FRCTL0_L = 0x0140;`
		164	`FRCTL0_H = 0x0141;`
		165	`GCCTL0 = 0x0144;`
		166	`GCCTL0_L = 0x0144;`
		167	`GCCTL0_H = 0x0145;`
		168	`GCCTL1 = 0x0146;`
		169	`GCCTL1_L = 0x0146;`
		170	`GCCTL1_H = 0x0147;`
		171	`/************************************************************`
		172	`* Memory Protection Unit`
		173	`************************************************************/`
		174	`MPUCTL0 = 0x05A0;`
		175	`MPUCTL0_L = 0x05A0;`
		176	`MPUCTL0_H = 0x05A1;`
		177	`MPUCTL1 = 0x05A2;`
		178	`MPUCTL1_L = 0x05A2;`
		179	`MPUCTL1_H = 0x05A3;`
		180	`MPUSEG = 0x05A4;`
		181	`MPUSEG_L = 0x05A4;`
		182	`MPUSEG_H = 0x05A5;`
		183	`MPUSAM = 0x05A6;`
		184	`MPUSAM_L = 0x05A6;`
		185	`MPUSAM_H = 0x05A7;`
		186	`/************************************************************`
		187	`* HARDWARE MULTIPLIER 32Bit`
		188	`************************************************************/`
		189	`MPY = 0x04C0;`
		190	`MPY_L = 0x04C0;`
		191	`MPY_H = 0x04C1;`
		192	`MPYS = 0x04C2;`
		193	`MPYS_L = 0x04C2;`
		194	`MPYS_H = 0x04C3;`
		195	`MAC = 0x04C4;`
		196	`MAC_L = 0x04C4;`
		197	`MAC_H = 0x04C5;`
		198	`MACS = 0x04C6;`
		199	`MACS_L = 0x04C6;`
		200	`MACS_H = 0x04C7;`
		201	`OP2 = 0x04C8;`
		202	`OP2_L = 0x04C8;`
		203	`OP2_H = 0x04C9;`
		204	`RESLO = 0x04CA;`
		205	`RESLO_L = 0x04CA;`
		206	`RESLO_H = 0x04CB;`
		207	`RESHI = 0x04CC;`
		208	`RESHI_L = 0x04CC;`
		209	`RESHI_H = 0x04CD;`
		210	`SUMEXT = 0x04CE;`
		211	`SUMEXT_L = 0x04CE;`
		212	`SUMEXT_H = 0x04CF;`
		213	`MPY32L = 0x04D0;`
		214	`MPY32L_L = 0x04D0;`
		215	`MPY32L_H = 0x04D1;`
		216	`MPY32H = 0x04D2;`
		217	`MPY32H_L = 0x04D2;`
		218	`MPY32H_H = 0x04D3;`
		219	`MPYS32L = 0x04D4;`
		220	`MPYS32L_L = 0x04D4;`
		221	`MPYS32L_H = 0x04D5;`
		222	`MPYS32H = 0x04D6;`
		223	`MPYS32H_L = 0x04D6;`
		224	`MPYS32H_H = 0x04D7;`
		225	`MAC32L = 0x04D8;`
		226	`MAC32L_L = 0x04D8;`
		227	`MAC32L_H = 0x04D9;`
		228	`MAC32H = 0x04DA;`
		229	`MAC32H_L = 0x04DA;`
		230	`MAC32H_H = 0x04DB;`
		231	`MACS32L = 0x04DC;`
		232	`MACS32L_L = 0x04DC;`
		233	`MACS32L_H = 0x04DD;`
		234	`MACS32H = 0x04DE;`
		235	`MACS32H_L = 0x04DE;`
		236	`MACS32H_H = 0x04DF;`
		237	`OP2L = 0x04E0;`
		238	`OP2L_L = 0x04E0;`
		239	`OP2L_H = 0x04E1;`
		240	`OP2H = 0x04E2;`
		241	`OP2H_L = 0x04E2;`
		242	`OP2H_H = 0x04E3;`
		243	`RES0 = 0x04E4;`
		244	`RES0_L = 0x04E4;`
		245	`RES0_H = 0x04E5;`
		246	`RES1 = 0x04E6;`
		247	`RES1_L = 0x04E6;`
		248	`RES1_H = 0x04E7;`
		249	`RES2 = 0x04E8;`
		250	`RES2_L = 0x04E8;`
		251	`RES2_H = 0x04E9;`
		252	`RES3 = 0x04EA;`
		253	`RES3_L = 0x04EA;`
		254	`RES3_H = 0x04EB;`
		255	`MPY32CTL0 = 0x04EC;`
		256	`MPY32CTL0_L = 0x04EC;`
		257	`MPY32CTL0_H = 0x04ED;`
		258	`/************************************************************`
		259	`* PMM - Power Management System`
		260	`************************************************************/`
		261	`PMMCTL0 = 0x0120;`
		262	`PMMCTL0_L = 0x0120;`
		263	`PMMCTL0_H = 0x0121;`
		264	`PMMIFG = 0x012A;`
		265	`PMMIFG_L = 0x012A;`
		266	`PMMIFG_H = 0x012B;`
		267	`PM5CTL0 = 0x0130;`
		268	`PM5CTL0_L = 0x0130;`
		269	`PM5CTL0_H = 0x0131;`
		270	`/************************************************************`
		271	`* DIGITAL I/O Port1/2 Pull up / Pull down Resistors`
		272	`************************************************************/`
		273	`PAIN = 0x0200;`
		274	`PAIN_L = 0x0200;`
		275	`PAIN_H = 0x0201;`
		276	`PAOUT = 0x0202;`
		277	`PAOUT_L = 0x0202;`
		278	`PAOUT_H = 0x0203;`
		279	`PADIR = 0x0204;`
		280	`PADIR_L = 0x0204;`
		281	`PADIR_H = 0x0205;`
		282	`PAREN = 0x0206;`
		283	`PAREN_L = 0x0206;`
		284	`PAREN_H = 0x0207;`
		285	`PADS = 0x0208;`
		286	`PADS_L = 0x0208;`
		287	`PADS_H = 0x0209;`
		288	`PASEL0 = 0x020A;`
		289	`PASEL0_L = 0x020A;`
		290	`PASEL0_H = 0x020B;`
		291	`PASEL1 = 0x020C;`
		292	`PASEL1_L = 0x020C;`
		293	`PASEL1_H = 0x020D;`
		294	`PASELC = 0x0210;`
		295	`PASELC_L = 0x0210;`
		296	`PASELC_H = 0x0211;`
		297	`PAIES = 0x0218;`
		298	`PAIES_L = 0x0218;`
		299	`PAIES_H = 0x0219;`
		300	`PAIE = 0x021A;`
		301	`PAIE_L = 0x021A;`
		302	`PAIE_H = 0x021B;`
		303	`PAIFG = 0x021C;`
		304	`PAIFG_L = 0x021C;`
		305	`PAIFG_H = 0x021D;`
		306	`P1IV = 0x020E;`
		307	`P2IV = 0x021E;`
		308	`/************************************************************`
		309	`* DIGITAL I/O PortJ Pull up / Pull down Resistors`
		310	`************************************************************/`
		311	`PJIN = 0x0320;`
		312	`PJIN_L = 0x0320;`
		313	`PJIN_H = 0x0321;`
		314	`PJOUT = 0x0322;`
		315	`PJOUT_L = 0x0322;`
		316	`PJOUT_H = 0x0323;`
		317	`PJDIR = 0x0324;`
		318	`PJDIR_L = 0x0324;`
		319	`PJDIR_H = 0x0325;`
		320	`PJREN = 0x0326;`
		321	`PJREN_L = 0x0326;`
		322	`PJREN_H = 0x0327;`
		323	`PJDS = 0x0328;`
		324	`PJDS_L = 0x0328;`
		325	`PJDS_H = 0x0329;`
		326	`PJSEL0 = 0x032A;`
		327	`PJSEL0_L = 0x032A;`
		328	`PJSEL0_H = 0x032B;`
		329	`PJSEL1 = 0x032C;`
		330	`PJSEL1_L = 0x032C;`
		331	`PJSEL1_H = 0x032D;`
		332	`/************************************************************`
		333	`* Shared Reference`
		334	`************************************************************/`
		335	`REFCTL0 = 0x01B0;`
		336	`REFCTL0_L = 0x01B0;`
		337	`REFCTL0_H = 0x01B1;`
		338	`/************************************************************`
		339	`* Real Time Clock`
		340	`************************************************************/`
		341	`RTCCTL01 = 0x04A0;`
		342	`RTCCTL01_L = 0x04A0;`
		343	`RTCCTL01_H = 0x04A1;`
		344	`RTCCTL23 = 0x04A2;`
		345	`RTCCTL23_L = 0x04A2;`
		346	`RTCCTL23_H = 0x04A3;`
		347	`RTCPS0CTL = 0x04A8;`
		348	`RTCPS0CTL_L = 0x04A8;`
		349	`RTCPS0CTL_H = 0x04A9;`
		350	`RTCPS1CTL = 0x04AA;`
		351	`RTCPS1CTL_L = 0x04AA;`
		352	`RTCPS1CTL_H = 0x04AB;`
		353	`RTCPS = 0x04AC;`
		354	`RTCPS_L = 0x04AC;`
		355	`RTCPS_H = 0x04AD;`
		356	`RTCIV = 0x04AE;`
		357	`RTCTIM0 = 0x04B0;`
		358	`RTCTIM0_L = 0x04B0;`
		359	`RTCTIM0_H = 0x04B1;`
		360	`RTCTIM1 = 0x04B2;`
		361	`RTCTIM1_L = 0x04B2;`
		362	`RTCTIM1_H = 0x04B3;`
		363	`RTCDATE = 0x04B4;`
		364	`RTCDATE_L = 0x04B4;`
		365	`RTCDATE_H = 0x04B5;`
		366	`RTCYEAR = 0x04B6;`
		367	`RTCYEAR_L = 0x04B6;`
		368	`RTCYEAR_H = 0x04B7;`
		369	`RTCAMINHR = 0x04B8;`
		370	`RTCAMINHR_L = 0x04B8;`
		371	`RTCAMINHR_H = 0x04B9;`
		372	`RTCADOWDAY = 0x04BA;`
		373	`RTCADOWDAY_L = 0x04BA;`
		374	`RTCADOWDAY_H = 0x04BB;`
		375	`BIN2BCD = 0x04BC;`
		376	`BCD2BIN = 0x04BE;`
		377	`/************************************************************`
		378	`* SFR - Special Function Register Module`
		379	`************************************************************/`
		380	`SFRIE1 = 0x0100;`
		381	`SFRIE1_L = 0x0100;`
		382	`SFRIE1_H = 0x0101;`
		383	`SFRIFG1 = 0x0102;`
		384	`SFRIFG1_L = 0x0102;`
		385	`SFRIFG1_H = 0x0103;`
		386	`SFRRPCR = 0x0104;`
		387	`SFRRPCR_L = 0x0104;`
		388	`SFRRPCR_H = 0x0105;`
		389	`/************************************************************`
		390	`* SYS - System Module`
		391	`************************************************************/`
		392	`SYSCTL = 0x0180;`
		393	`SYSCTL_L = 0x0180;`
		394	`SYSCTL_H = 0x0181;`
		395	`SYSBSLC = 0x0182;`
		396	`SYSBSLC_L = 0x0182;`
		397	`SYSBSLC_H = 0x0183;`
		398	`SYSJMBC = 0x0186;`
		399	`SYSJMBC_L = 0x0186;`
		400	`SYSJMBC_H = 0x0187;`
		401	`SYSJMBI0 = 0x0188;`
		402	`SYSJMBI0_L = 0x0188;`
		403	`SYSJMBI0_H = 0x0189;`
		404	`SYSJMBI1 = 0x018A;`
		405	`SYSJMBI1_L = 0x018A;`
		406	`SYSJMBI1_H = 0x018B;`
		407	`SYSJMBO0 = 0x018C;`
		408	`SYSJMBO0_L = 0x018C;`
		409	`SYSJMBO0_H = 0x018D;`
		410	`SYSJMBO1 = 0x018E;`
		411	`SYSJMBO1_L = 0x018E;`
		412	`SYSJMBO1_H = 0x018F;`
		413	`SYSBERRIV = 0x0198;`
		414	`SYSBERRIV_L = 0x0198;`
		415	`SYSBERRIV_H = 0x0199;`
		416	`SYSUNIV = 0x019A;`
		417	`SYSUNIV_L = 0x019A;`
		418	`SYSUNIV_H = 0x019B;`
		419	`SYSSNIV = 0x019C;`
		420	`SYSSNIV_L = 0x019C;`
		421	`SYSSNIV_H = 0x019D;`
		422	`SYSRSTIV = 0x019E;`
		423	`SYSRSTIV_L = 0x019E;`
		424	`SYSRSTIV_H = 0x019F;`
		425	`/************************************************************`
		426	`* Timer0_A3`
		427	`************************************************************/`
		428	`TA0CTL = 0x0340;`
		429	`TA0CCTL0 = 0x0342;`
		430	`TA0CCTL1 = 0x0344;`
		431	`TA0CCTL2 = 0x0346;`
		432	`TA0R = 0x0350;`
		433	`TA0CCR0 = 0x0352;`
		434	`TA0CCR1 = 0x0354;`
		435	`TA0CCR2 = 0x0356;`
		436	`TA0IV = 0x036E;`
		437	`TA0EX0 = 0x0360;`
		438	`/************************************************************`
		439	`* Timer1_A3`
		440	`************************************************************/`
		441	`TA1CTL = 0x0380;`
		442	`TA1CCTL0 = 0x0382;`
		443	`TA1CCTL1 = 0x0384;`
		444	`TA1CCTL2 = 0x0386;`
		445	`TA1R = 0x0390;`
		446	`TA1CCR0 = 0x0392;`
		447	`TA1CCR1 = 0x0394;`
		448	`TA1CCR2 = 0x0396;`
		449	`TA1IV = 0x03AE;`
		450	`TA1EX0 = 0x03A0;`
		451	`/************************************************************`
		452	`* Timer0_B3`
		453	`************************************************************/`
		454	`TB0CTL = 0x03C0;`
		455	`TB0CCTL0 = 0x03C2;`
		456	`TB0CCTL1 = 0x03C4;`
		457	`TB0CCTL2 = 0x03C6;`
		458	`TB0R = 0x03D0;`
		459	`TB0CCR0 = 0x03D2;`
		460	`TB0CCR1 = 0x03D4;`
		461	`TB0CCR2 = 0x03D6;`
		462	`TB0EX0 = 0x03E0;`
		463	`TB0IV = 0x03EE;`
		464	`/************************************************************`
		465	`* USCI A0`
		466	`************************************************************/`
		467	`UCA0CTLW0 = 0x05C0;`
		468	`UCA0CTLW0_L = 0x05C0;`
		469	`UCA0CTLW0_H = 0x05C1;`
		470	`UCA0CTLW1 = 0x05C2;`
		471	`UCA0CTLW1_L = 0x05C2;`
		472	`UCA0CTLW1_H = 0x05C3;`
		473	`UCA0BRW = 0x05C6;`
		474	`UCA0BRW_L = 0x05C6;`
		475	`UCA0BRW_H = 0x05C7;`
		476	`UCA0MCTLW = 0x05C8;`
		477	`UCA0MCTLW_L = 0x05C8;`
		478	`UCA0MCTLW_H = 0x05C9;`
		479	`UCA0STATW = 0x05CA;`
		480	`UCA0RXBUF = 0x05CC;`
		481	`UCA0RXBUF_L = 0x05CC;`
		482	`UCA0RXBUF_H = 0x05CD;`
		483	`UCA0TXBUF = 0x05CE;`
		484	`UCA0TXBUF_L = 0x05CE;`
		485	`UCA0TXBUF_H = 0x05CF;`
		486	`UCA0ABCTL = 0x05D0;`
		487	`UCA0IRCTL = 0x05D2;`
		488	`UCA0IRCTL_L = 0x05D2;`
		489	`UCA0IRCTL_H = 0x05D3;`
		490	`UCA0IE = 0x05DA;`
		491	`UCA0IE_L = 0x05DA;`
		492	`UCA0IE_H = 0x05DB;`
		493	`UCA0IFG = 0x05DC;`
		494	`UCA0IFG_L = 0x05DC;`
		495	`UCA0IFG_H = 0x05DD;`
		496	`UCA0IV = 0x05DE;`
		497	`/************************************************************`
		498	`* USCI B0`
		499	`************************************************************/`
		500	`UCB0CTLW0 = 0x0640;`
		501	`UCB0CTLW0_L = 0x0640;`
		502	`UCB0CTLW0_H = 0x0641;`
		503	`UCB0CTLW1 = 0x0642;`
		504	`UCB0CTLW1_L = 0x0642;`
		505	`UCB0CTLW1_H = 0x0643;`
		506	`UCB0BRW = 0x0646;`
		507	`UCB0BRW_L = 0x0646;`
		508	`UCB0BRW_H = 0x0647;`
		509	`UCB0STATW = 0x0648;`
		510	`UCB0STATW_L = 0x0648;`
		511	`UCB0STATW_H = 0x0649;`
		512	`UCB0TBCNT = 0x064A;`
		513	`UCB0TBCNT_L = 0x064A;`
		514	`UCB0TBCNT_H = 0x064B;`
		515	`UCB0RXBUF = 0x064C;`
		516	`UCB0RXBUF_L = 0x064C;`
		517	`UCB0RXBUF_H = 0x064D;`
		518	`UCB0TXBUF = 0x064E;`
		519	`UCB0TXBUF_L = 0x064E;`
		520	`UCB0TXBUF_H = 0x064F;`
		521	`UCB0I2COA0 = 0x0654;`
		522	`UCB0I2COA0_L = 0x0654;`
		523	`UCB0I2COA0_H = 0x0655;`
		524	`UCB0I2COA1 = 0x0656;`
		525	`UCB0I2COA1_L = 0x0656;`
		526	`UCB0I2COA1_H = 0x0657;`
		527	`UCB0I2COA2 = 0x0658;`
		528	`UCB0I2COA2_L = 0x0658;`
		529	`UCB0I2COA2_H = 0x0659;`
		530	`UCB0I2COA3 = 0x065A;`
		531	`UCB0I2COA3_L = 0x065A;`
		532	`UCB0I2COA3_H = 0x065B;`
		533	`UCB0ADDRX = 0x065C;`
		534	`UCB0ADDRX_L = 0x065C;`
		535	`UCB0ADDRX_H = 0x065D;`
		536	`UCB0ADDMASK = 0x065E;`
		537	`UCB0ADDMASK_L = 0x065E;`
		538	`UCB0ADDMASK_H = 0x065F;`
		539	`UCB0I2CSA = 0x0660;`
		540	`UCB0I2CSA_L = 0x0660;`
		541	`UCB0I2CSA_H = 0x0661;`
		542	`UCB0IE = 0x066A;`
		543	`UCB0IE_L = 0x066A;`
		544	`UCB0IE_H = 0x066B;`
		545	`UCB0IFG = 0x066C;`
		546	`UCB0IFG_L = 0x066C;`
		547	`UCB0IFG_H = 0x066D;`
		548	`UCB0IV = 0x066E;`
		549	`/************************************************************`
		550	`* WATCHDOG TIMER A`
		551	`************************************************************/`
		552	`WDTCTL = 0x015C;`
		553	`WDTCTL_L = 0x015C;`
		554	`WDTCTL_H = 0x015D;`
		555	`/************************************************************`
		556	`* Interrupt Vectors (offset from 0xFF80)`
		557	`************************************************************/`
		558	`/************************************************************`
		559	`* End of Modules`
		560	`************************************************************/`

Subversion Repositories DevTools

(root)/TexasInstrumentsMsp430/trunk/src/ccsv4/msp430/include/msp430fr5738.cmd – Rev 2850