WebSVN – DevTools – Blame – /TexasInstrumentsMsp430/trunk/src/ccsv4/msp430/include/msp430f5132.cmd

Rev	Author	Line No.	Line
2850	dpurdie	1	`/******************************************************************************/`
		2	`/* msp430f5132.cmd */`
		3	`/* - Linker Command File for defintions in the header file */`
		4	`/* Please do not change ! */`
		5	`/* */`
		6	`/******************************************************************************/`
		7
		8
		9	`/************************************************************`
		10	`* STANDARD BITS`
		11	`************************************************************/`
		12	`/************************************************************`
		13	`* STATUS REGISTER BITS`
		14	`************************************************************/`
		15	`/************************************************************`
		16	`* CPU`
		17	`************************************************************/`
		18	`/************************************************************`
		19	`* PERIPHERAL FILE MAP`
		20	`************************************************************/`
		21	`/************************************************************`
		22	`* ADC10_A`
		23	`************************************************************/`
		24	`ADC10CTL0 = 0x0740;`
		25	`ADC10CTL0_L = 0x0740;`
		26	`ADC10CTL0_H = 0x0741;`
		27	`ADC10CTL1 = 0x0742;`
		28	`ADC10CTL1_L = 0x0742;`
		29	`ADC10CTL1_H = 0x0743;`
		30	`ADC10CTL2 = 0x0744;`
		31	`ADC10CTL2_L = 0x0744;`
		32	`ADC10CTL2_H = 0x0745;`
		33	`ADC10LO = 0x0746;`
		34	`ADC10LO_L = 0x0746;`
		35	`ADC10LO_H = 0x0747;`
		36	`ADC10HI = 0x0748;`
		37	`ADC10HI_L = 0x0748;`
		38	`ADC10HI_H = 0x0749;`
		39	`ADC10MCTL0 = 0x074A;`
		40	`ADC10MCTL0_L = 0x074A;`
		41	`ADC10MCTL0_H = 0x074B;`
		42	`ADC10MEM0 = 0x0752;`
		43	`ADC10MEM0_L = 0x0752;`
		44	`ADC10MEM0_H = 0x0753;`
		45	`ADC10IE = 0x075A;`
		46	`ADC10IE_L = 0x075A;`
		47	`ADC10IE_H = 0x075B;`
		48	`ADC10IFG = 0x075C;`
		49	`ADC10IFG_L = 0x075C;`
		50	`ADC10IFG_H = 0x075D;`
		51	`ADC10IV = 0x075E;`
		52	`ADC10IV_L = 0x075E;`
		53	`ADC10IV_H = 0x075F;`
		54	`/************************************************************`
		55	`* Comparator B`
		56	`************************************************************/`
		57	`CBCTL0 = 0x08C0;`
		58	`CBCTL0_L = 0x08C0;`
		59	`CBCTL0_H = 0x08C1;`
		60	`CBCTL1 = 0x08C2;`
		61	`CBCTL1_L = 0x08C2;`
		62	`CBCTL1_H = 0x08C3;`
		63	`CBCTL2 = 0x08C4;`
		64	`CBCTL2_L = 0x08C4;`
		65	`CBCTL2_H = 0x08C5;`
		66	`CBCTL3 = 0x08C6;`
		67	`CBCTL3_L = 0x08C6;`
		68	`CBCTL3_H = 0x08C7;`
		69	`CBINT = 0x08CC;`
		70	`CBINT_L = 0x08CC;`
		71	`CBINT_H = 0x08CD;`
		72	`CBIV = 0x08CE;`
		73	`/*************************************************************`
		74	`* CRC Module`
		75	`*************************************************************/`
		76	`CRCDI = 0x0150;`
		77	`CRCDI_L = 0x0150;`
		78	`CRCDI_H = 0x0151;`
		79	`CRCDIRB = 0x0152;`
		80	`CRCDIRB_L = 0x0152;`
		81	`CRCDIRB_H = 0x0153;`
		82	`CRCINIRES = 0x0154;`
		83	`CRCINIRES_L = 0x0154;`
		84	`CRCINIRES_H = 0x0155;`
		85	`CRCRESR = 0x0156;`
		86	`CRCRESR_L = 0x0156;`
		87	`CRCRESR_H = 0x0157;`
		88	`/************************************************************`
		89	`* DMA_X`
		90	`************************************************************/`
		91	`DMACTL0 = 0x0500;`
		92	`DMACTL0_L = 0x0500;`
		93	`DMACTL0_H = 0x0501;`
		94	`DMACTL1 = 0x0502;`
		95	`DMACTL1_L = 0x0502;`
		96	`DMACTL1_H = 0x0503;`
		97	`DMACTL2 = 0x0504;`
		98	`DMACTL2_L = 0x0504;`
		99	`DMACTL2_H = 0x0505;`
		100	`DMACTL3 = 0x0506;`
		101	`DMACTL3_L = 0x0506;`
		102	`DMACTL3_H = 0x0507;`
		103	`DMACTL4 = 0x0508;`
		104	`DMACTL4_L = 0x0508;`
		105	`DMACTL4_H = 0x0509;`
		106	`DMAIV = 0x050E;`
		107	`DMAIV_L = 0x050E;`
		108	`DMAIV_H = 0x050F;`
		109	`DMA0CTL = 0x0510;`
		110	`DMA0CTL_L = 0x0510;`
		111	`DMA0CTL_H = 0x0511;`
		112	`DMA0SA = 0x0512;`
		113	`DMA0SAL = 0x0512;`
		114	`DMA0DA = 0x0516;`
		115	`DMA0DAL = 0x0516;`
		116	`DMA0SZ = 0x051A;`
		117	`DMA1CTL = 0x0520;`
		118	`DMA1CTL_L = 0x0520;`
		119	`DMA1CTL_H = 0x0521;`
		120	`DMA1SA = 0x0522;`
		121	`DMA1SAL = 0x0522;`
		122	`DMA1DA = 0x0526;`
		123	`DMA1DAL = 0x0526;`
		124	`DMA1SZ = 0x052A;`
		125	`DMA2CTL = 0x0530;`
		126	`DMA2CTL_L = 0x0530;`
		127	`DMA2CTL_H = 0x0531;`
		128	`DMA2SA = 0x0532;`
		129	`DMA2SAL = 0x0532;`
		130	`DMA2DA = 0x0536;`
		131	`DMA2DAL = 0x0536;`
		132	`DMA2SZ = 0x053A;`
		133	`/*************************************************************`
		134	`* Flash Memory`
		135	`*************************************************************/`
		136	`FCTL1 = 0x0140;`
		137	`FCTL1_L = 0x0140;`
		138	`FCTL1_H = 0x0141;`
		139	`FCTL3 = 0x0144;`
		140	`FCTL3_L = 0x0144;`
		141	`FCTL3_H = 0x0145;`
		142	`FCTL4 = 0x0146;`
		143	`FCTL4_L = 0x0146;`
		144	`FCTL4_H = 0x0147;`
		145	`/************************************************************`
		146	`* HARDWARE MULTIPLIER 32Bit`
		147	`************************************************************/`
		148	`MPY = 0x04C0;`
		149	`MPY_L = 0x04C0;`
		150	`MPY_H = 0x04C1;`
		151	`MPYS = 0x04C2;`
		152	`MPYS_L = 0x04C2;`
		153	`MPYS_H = 0x04C3;`
		154	`MAC = 0x04C4;`
		155	`MAC_L = 0x04C4;`
		156	`MAC_H = 0x04C5;`
		157	`MACS = 0x04C6;`
		158	`MACS_L = 0x04C6;`
		159	`MACS_H = 0x04C7;`
		160	`OP2 = 0x04C8;`
		161	`OP2_L = 0x04C8;`
		162	`OP2_H = 0x04C9;`
		163	`RESLO = 0x04CA;`
		164	`RESLO_L = 0x04CA;`
		165	`RESLO_H = 0x04CB;`
		166	`RESHI = 0x04CC;`
		167	`RESHI_L = 0x04CC;`
		168	`RESHI_H = 0x04CD;`
		169	`SUMEXT = 0x04CE;`
		170	`SUMEXT_L = 0x04CE;`
		171	`SUMEXT_H = 0x04CF;`
		172	`MPY32L = 0x04D0;`
		173	`MPY32L_L = 0x04D0;`
		174	`MPY32L_H = 0x04D1;`
		175	`MPY32H = 0x04D2;`
		176	`MPY32H_L = 0x04D2;`
		177	`MPY32H_H = 0x04D3;`
		178	`MPYS32L = 0x04D4;`
		179	`MPYS32L_L = 0x04D4;`
		180	`MPYS32L_H = 0x04D5;`
		181	`MPYS32H = 0x04D6;`
		182	`MPYS32H_L = 0x04D6;`
		183	`MPYS32H_H = 0x04D7;`
		184	`MAC32L = 0x04D8;`
		185	`MAC32L_L = 0x04D8;`
		186	`MAC32L_H = 0x04D9;`
		187	`MAC32H = 0x04DA;`
		188	`MAC32H_L = 0x04DA;`
		189	`MAC32H_H = 0x04DB;`
		190	`MACS32L = 0x04DC;`
		191	`MACS32L_L = 0x04DC;`
		192	`MACS32L_H = 0x04DD;`
		193	`MACS32H = 0x04DE;`
		194	`MACS32H_L = 0x04DE;`
		195	`MACS32H_H = 0x04DF;`
		196	`OP2L = 0x04E0;`
		197	`OP2L_L = 0x04E0;`
		198	`OP2L_H = 0x04E1;`
		199	`OP2H = 0x04E2;`
		200	`OP2H_L = 0x04E2;`
		201	`OP2H_H = 0x04E3;`
		202	`RES0 = 0x04E4;`
		203	`RES0_L = 0x04E4;`
		204	`RES0_H = 0x04E5;`
		205	`RES1 = 0x04E6;`
		206	`RES1_L = 0x04E6;`
		207	`RES1_H = 0x04E7;`
		208	`RES2 = 0x04E8;`
		209	`RES2_L = 0x04E8;`
		210	`RES2_H = 0x04E9;`
		211	`RES3 = 0x04EA;`
		212	`RES3_L = 0x04EA;`
		213	`RES3_H = 0x04EB;`
		214	`MPY32CTL0 = 0x04EC;`
		215	`MPY32CTL0_L = 0x04EC;`
		216	`MPY32CTL0_H = 0x04ED;`
		217	`/************************************************************`
		218	`* DIGITAL I/O Port1/2 Pull up / Pull down Resistors`
		219	`************************************************************/`
		220	`PAIN = 0x0200;`
		221	`PAIN_L = 0x0200;`
		222	`PAIN_H = 0x0201;`
		223	`PAOUT = 0x0202;`
		224	`PAOUT_L = 0x0202;`
		225	`PAOUT_H = 0x0203;`
		226	`PADIR = 0x0204;`
		227	`PADIR_L = 0x0204;`
		228	`PADIR_H = 0x0205;`
		229	`PAREN = 0x0206;`
		230	`PAREN_L = 0x0206;`
		231	`PAREN_H = 0x0207;`
		232	`PADS = 0x0208;`
		233	`PADS_L = 0x0208;`
		234	`PADS_H = 0x0209;`
		235	`PASEL = 0x020A;`
		236	`PASEL_L = 0x020A;`
		237	`PASEL_H = 0x020B;`
		238	`PAIES = 0x0218;`
		239	`PAIES_L = 0x0218;`
		240	`PAIES_H = 0x0219;`
		241	`PAIE = 0x021A;`
		242	`PAIE_L = 0x021A;`
		243	`PAIE_H = 0x021B;`
		244	`PAIFG = 0x021C;`
		245	`PAIFG_L = 0x021C;`
		246	`PAIFG_H = 0x021D;`
		247	`P1IV = 0x020E;`
		248	`P2IV = 0x021E;`
		249	`/************************************************************`
		250	`* DIGITAL I/O Port3 Pull up / Pull down Resistors`
		251	`************************************************************/`
		252	`PBIN = 0x0220;`
		253	`PBIN_L = 0x0220;`
		254	`PBIN_H = 0x0221;`
		255	`PBOUT = 0x0222;`
		256	`PBOUT_L = 0x0222;`
		257	`PBOUT_H = 0x0223;`
		258	`PBDIR = 0x0224;`
		259	`PBDIR_L = 0x0224;`
		260	`PBDIR_H = 0x0225;`
		261	`PBREN = 0x0226;`
		262	`PBREN_L = 0x0226;`
		263	`PBREN_H = 0x0227;`
		264	`PBDS = 0x0228;`
		265	`PBDS_L = 0x0228;`
		266	`PBDS_H = 0x0229;`
		267	`PBSEL = 0x022A;`
		268	`PBSEL_L = 0x022A;`
		269	`PBSEL_H = 0x022B;`
		270	`/************************************************************`
		271	`* DIGITAL I/O PortJ Pull up / Pull down Resistors`
		272	`************************************************************/`
		273	`PJIN = 0x0320;`
		274	`PJIN_L = 0x0320;`
		275	`PJIN_H = 0x0321;`
		276	`PJOUT = 0x0322;`
		277	`PJOUT_L = 0x0322;`
		278	`PJOUT_H = 0x0323;`
		279	`PJDIR = 0x0324;`
		280	`PJDIR_L = 0x0324;`
		281	`PJDIR_H = 0x0325;`
		282	`PJREN = 0x0326;`
		283	`PJREN_L = 0x0326;`
		284	`PJREN_H = 0x0327;`
		285	`PJDS = 0x0328;`
		286	`PJDS_L = 0x0328;`
		287	`PJDS_H = 0x0329;`
		288	`PJSEL = 0x032A;`
		289	`PJSEL_L = 0x032A;`
		290	`PJSEL_H = 0x032B;`
		291	`/************************************************************`
		292	`* PORT MAPPING CONTROLLER`
		293	`************************************************************/`
		294	`PMAPKEYID = 0x01C0;`
		295	`PMAPKEYID_L = 0x01C0;`
		296	`PMAPKEYID_H = 0x01C1;`
		297	`PMAPCTL = 0x01C2;`
		298	`PMAPCTL_L = 0x01C2;`
		299	`PMAPCTL_H = 0x01C3;`
		300	`/************************************************************`
		301	`* PORT 1 MAPPING CONTROLLER`
		302	`************************************************************/`
		303	`P1MAP01 = 0x01C8;`
		304	`P1MAP01_L = 0x01C8;`
		305	`P1MAP01_H = 0x01C9;`
		306	`P1MAP23 = 0x01CA;`
		307	`P1MAP23_L = 0x01CA;`
		308	`P1MAP23_H = 0x01CB;`
		309	`P1MAP45 = 0x01CC;`
		310	`P1MAP45_L = 0x01CC;`
		311	`P1MAP45_H = 0x01CD;`
		312	`P1MAP67 = 0x01CE;`
		313	`P1MAP67_L = 0x01CE;`
		314	`P1MAP67_H = 0x01CF;`
		315	`/************************************************************`
		316	`* PORT 2 MAPPING CONTROLLER`
		317	`************************************************************/`
		318	`P2MAP01 = 0x01D0;`
		319	`P2MAP01_L = 0x01D0;`
		320	`P2MAP01_H = 0x01D1;`
		321	`P2MAP23 = 0x01D2;`
		322	`P2MAP23_L = 0x01D2;`
		323	`P2MAP23_H = 0x01D3;`
		324	`P2MAP45 = 0x01D4;`
		325	`P2MAP45_L = 0x01D4;`
		326	`P2MAP45_H = 0x01D5;`
		327	`P2MAP67 = 0x01D6;`
		328	`P2MAP67_L = 0x01D6;`
		329	`P2MAP67_H = 0x01D7;`
		330	`/************************************************************`
		331	`* PORT 3 MAPPING CONTROLLER`
		332	`************************************************************/`
		333	`P3MAP01 = 0x01D8;`
		334	`P3MAP01_L = 0x01D8;`
		335	`P3MAP01_H = 0x01D9;`
		336	`P3MAP23 = 0x01DA;`
		337	`P3MAP23_L = 0x01DA;`
		338	`P3MAP23_H = 0x01DB;`
		339	`P3MAP45 = 0x01DC;`
		340	`P3MAP45_L = 0x01DC;`
		341	`P3MAP45_H = 0x01DD;`
		342	`P3MAP67 = 0x01DE;`
		343	`P3MAP67_L = 0x01DE;`
		344	`P3MAP67_H = 0x01DF;`
		345	`/************************************************************`
		346	`* PMM - Power Management System`
		347	`************************************************************/`
		348	`PMMCTL0 = 0x0120;`
		349	`PMMCTL0_L = 0x0120;`
		350	`PMMCTL0_H = 0x0121;`
		351	`PMMCTL1 = 0x0122;`
		352	`PMMCTL1_L = 0x0122;`
		353	`PMMCTL1_H = 0x0123;`
		354	`SVSMHCTL = 0x0124;`
		355	`SVSMHCTL_L = 0x0124;`
		356	`SVSMHCTL_H = 0x0125;`
		357	`SVSMLCTL = 0x0126;`
		358	`SVSMLCTL_L = 0x0126;`
		359	`SVSMLCTL_H = 0x0127;`
		360	`SVSMIO = 0x0128;`
		361	`SVSMIO_L = 0x0128;`
		362	`SVSMIO_H = 0x0129;`
		363	`PMMIFG = 0x012C;`
		364	`PMMIFG_L = 0x012C;`
		365	`PMMIFG_H = 0x012D;`
		366	`PMMRIE = 0x012E;`
		367	`PMMRIE_L = 0x012E;`
		368	`PMMRIE_H = 0x012F;`
		369	`PM5CTL0 = 0x0130;`
		370	`PM5CTL0_L = 0x0130;`
		371	`PM5CTL0_H = 0x0131;`
		372	`/*************************************************************`
		373	`* RAM Control Module`
		374	`*************************************************************/`
		375	`RCCTL0 = 0x0158;`
		376	`RCCTL0_L = 0x0158;`
		377	`RCCTL0_H = 0x0159;`
		378	`/************************************************************`
		379	`* Shared Reference`
		380	`************************************************************/`
		381	`REFCTL0 = 0x01B0;`
		382	`REFCTL0_L = 0x01B0;`
		383	`REFCTL0_H = 0x01B1;`
		384	`/************************************************************`
		385	`* SFR - Special Function Register Module`
		386	`************************************************************/`
		387	`SFRIE1 = 0x0100;`
		388	`SFRIE1_L = 0x0100;`
		389	`SFRIE1_H = 0x0101;`
		390	`SFRIFG1 = 0x0102;`
		391	`SFRIFG1_L = 0x0102;`
		392	`SFRIFG1_H = 0x0103;`
		393	`SFRRPCR = 0x0104;`
		394	`SFRRPCR_L = 0x0104;`
		395	`SFRRPCR_H = 0x0105;`
		396	`/************************************************************`
		397	`* SYS - System Module`
		398	`************************************************************/`
		399	`SYSCTL = 0x0180;`
		400	`SYSCTL_L = 0x0180;`
		401	`SYSCTL_H = 0x0181;`
		402	`SYSBSLC = 0x0182;`
		403	`SYSBSLC_L = 0x0182;`
		404	`SYSBSLC_H = 0x0183;`
		405	`SYSJMBC = 0x0186;`
		406	`SYSJMBC_L = 0x0186;`
		407	`SYSJMBC_H = 0x0187;`
		408	`SYSJMBI0 = 0x0188;`
		409	`SYSJMBI0_L = 0x0188;`
		410	`SYSJMBI0_H = 0x0189;`
		411	`SYSJMBI1 = 0x018A;`
		412	`SYSJMBI1_L = 0x018A;`
		413	`SYSJMBI1_H = 0x018B;`
		414	`SYSJMBO0 = 0x018C;`
		415	`SYSJMBO0_L = 0x018C;`
		416	`SYSJMBO0_H = 0x018D;`
		417	`SYSJMBO1 = 0x018E;`
		418	`SYSJMBO1_L = 0x018E;`
		419	`SYSJMBO1_H = 0x018F;`
		420	`SYSBERRIV = 0x0198;`
		421	`SYSBERRIV_L = 0x0198;`
		422	`SYSBERRIV_H = 0x0199;`
		423	`SYSUNIV = 0x019A;`
		424	`SYSUNIV_L = 0x019A;`
		425	`SYSUNIV_H = 0x019B;`
		426	`SYSSNIV = 0x019C;`
		427	`SYSSNIV_L = 0x019C;`
		428	`SYSSNIV_H = 0x019D;`
		429	`SYSRSTIV = 0x019E;`
		430	`SYSRSTIV_L = 0x019E;`
		431	`SYSRSTIV_H = 0x019F;`
		432	`/************************************************************`
		433	`* Timer0_A3`
		434	`************************************************************/`
		435	`TA0CTL = 0x03C0;`
		436	`TA0CCTL0 = 0x03C2;`
		437	`TA0CCTL1 = 0x03C4;`
		438	`TA0CCTL2 = 0x03C6;`
		439	`TA0R = 0x03D0;`
		440	`TA0CCR0 = 0x03D2;`
		441	`TA0CCR1 = 0x03D4;`
		442	`TA0CCR2 = 0x03D6;`
		443	`TA0IV = 0x03EE;`
		444	`TA0EX0 = 0x03E0;`
		445	`/************************************************************`
		446	`* Timer0_D3`
		447	`************************************************************/`
		448	`TD0CTL0 = 0x0B00;`
		449	`TD0CTL1 = 0x0B02;`
		450	`TD0CTL2 = 0x0B04;`
		451	`TD0R = 0x0B06;`
		452	`TD0CCTL0 = 0x0B08;`
		453	`TD0CCR0 = 0x0B0A;`
		454	`TD0CL0 = 0x0B0C;`
		455	`TD0CCTL1 = 0x0B0E;`
		456	`TD0CCR1 = 0x0B10;`
		457	`TD0CL1 = 0x0B12;`
		458	`TD0CCTL2 = 0x0B14;`
		459	`TD0CCR2 = 0x0B16;`
		460	`TD0CL2 = 0x0B18;`
		461	`TD0HCTL0 = 0x0B38;`
		462	`TD0HCTL1 = 0x0B3A;`
		463	`TD0HINT = 0x0B3C;`
		464	`TD0IV = 0x0B3E;`
		465	`/************************************************************`
		466	`* Timer1_D3`
		467	`************************************************************/`
		468	`TD1CTL0 = 0x0B40;`
		469	`TD1CTL1 = 0x0B42;`
		470	`TD1CTL2 = 0x0B44;`
		471	`TD1R = 0x0B46;`
		472	`TD1CCTL0 = 0x0B48;`
		473	`TD1CCR0 = 0x0B4A;`
		474	`TD1CL0 = 0x0B4C;`
		475	`TD1CCTL1 = 0x0B4E;`
		476	`TD1CCR1 = 0x0B50;`
		477	`TD1CL1 = 0x0B52;`
		478	`TD1CCTL2 = 0x0B54;`
		479	`TD1CCR2 = 0x0B56;`
		480	`TD1CL2 = 0x0B58;`
		481	`TD1HCTL0 = 0x0B78;`
		482	`TD1HCTL1 = 0x0B7A;`
		483	`TD1HINT = 0x0B7C;`
		484	`TD1IV = 0x0B7E;`
		485	`/************************************************************`
		486	`* Timer Event Control 0`
		487	`************************************************************/`
		488	`TEC0XCTL0 = 0x0C00;`
		489	`TEC0XCTL0_L = 0x0C00;`
		490	`TEC0XCTL0_H = 0x0C01;`
		491	`TEC0XCTL1 = 0x0C02;`
		492	`TEC0XCTL1_L = 0x0C02;`
		493	`TEC0XCTL1_H = 0x0C03;`
		494	`TEC0XCTL2 = 0x0C04;`
		495	`TEC0XCTL2_L = 0x0C04;`
		496	`TEC0XCTL2_H = 0x0C05;`
		497	`TEC0STA = 0x0C06;`
		498	`TEC0STA_L = 0x0C06;`
		499	`TEC0STA_H = 0x0C07;`
		500	`TEC0XINT = 0x0C08;`
		501	`TEC0XINT_L = 0x0C08;`
		502	`TEC0XINT_H = 0x0C09;`
		503	`TEC0IV = 0x0C0A;`
		504	`TEC0IV_L = 0x0C0A;`
		505	`TEC0IV_H = 0x0C0B;`
		506	`/************************************************************`
		507	`* Timer Event Control 1`
		508	`************************************************************/`
		509	`TEC1XCTL0 = 0x0C20;`
		510	`TEC1XCTL0_L = 0x0C20;`
		511	`TEC1XCTL0_H = 0x0C21;`
		512	`TEC1XCTL1 = 0x0C22;`
		513	`TEC1XCTL1_L = 0x0C22;`
		514	`TEC1XCTL1_H = 0x0C23;`
		515	`TEC1XCTL2 = 0x0C24;`
		516	`TEC1XCTL2_L = 0x0C24;`
		517	`TEC1XCTL2_H = 0x0C25;`
		518	`TEC1STA = 0x0C26;`
		519	`TEC1STA_L = 0x0C26;`
		520	`TEC1STA_H = 0x0C27;`
		521	`TEC1XINT = 0x0C28;`
		522	`TEC1XINT_L = 0x0C28;`
		523	`TEC1XINT_H = 0x0C29;`
		524	`TEC1IV = 0x0C2A;`
		525	`TEC1IV_L = 0x0C2A;`
		526	`TEC1IV_H = 0x0C2B;`
		527	`/************************************************************`
		528	`* UNIFIED CLOCK SYSTEM`
		529	`************************************************************/`
		530	`UCSCTL0 = 0x0160;`
		531	`UCSCTL0_L = 0x0160;`
		532	`UCSCTL0_H = 0x0161;`
		533	`UCSCTL1 = 0x0162;`
		534	`UCSCTL1_L = 0x0162;`
		535	`UCSCTL1_H = 0x0163;`
		536	`UCSCTL2 = 0x0164;`
		537	`UCSCTL2_L = 0x0164;`
		538	`UCSCTL2_H = 0x0165;`
		539	`UCSCTL3 = 0x0166;`
		540	`UCSCTL3_L = 0x0166;`
		541	`UCSCTL3_H = 0x0167;`
		542	`UCSCTL4 = 0x0168;`
		543	`UCSCTL4_L = 0x0168;`
		544	`UCSCTL4_H = 0x0169;`
		545	`UCSCTL5 = 0x016A;`
		546	`UCSCTL5_L = 0x016A;`
		547	`UCSCTL5_H = 0x016B;`
		548	`UCSCTL6 = 0x016C;`
		549	`UCSCTL6_L = 0x016C;`
		550	`UCSCTL6_H = 0x016D;`
		551	`UCSCTL7 = 0x016E;`
		552	`UCSCTL7_L = 0x016E;`
		553	`UCSCTL7_H = 0x016F;`
		554	`UCSCTL8 = 0x0170;`
		555	`UCSCTL8_L = 0x0170;`
		556	`UCSCTL8_H = 0x0171;`
		557	`/************************************************************`
		558	`* USCI A0`
		559	`************************************************************/`
		560	`UCA0CTLW0 = 0x05C0;`
		561	`UCA0CTLW0_L = 0x05C0;`
		562	`UCA0CTLW0_H = 0x05C1;`
		563	`UCA0BRW = 0x05C6;`
		564	`UCA0BRW_L = 0x05C6;`
		565	`UCA0BRW_H = 0x05C7;`
		566	`UCA0MCTL = 0x05C8;`
		567	`UCA0STAT = 0x05CA;`
		568	`UCA0RXBUF = 0x05CC;`
		569	`UCA0TXBUF = 0x05CE;`
		570	`UCA0ABCTL = 0x05D0;`
		571	`UCA0IRCTL = 0x05D2;`
		572	`UCA0IRCTL_L = 0x05D2;`
		573	`UCA0IRCTL_H = 0x05D3;`
		574	`UCA0ICTL = 0x05DC;`
		575	`UCA0ICTL_L = 0x05DC;`
		576	`UCA0ICTL_H = 0x05DD;`
		577	`UCA0IV = 0x05DE;`
		578	`/************************************************************`
		579	`* USCI B0`
		580	`************************************************************/`
		581	`UCB0CTLW0 = 0x05E0;`
		582	`UCB0CTLW0_L = 0x05E0;`
		583	`UCB0CTLW0_H = 0x05E1;`
		584	`UCB0BRW = 0x05E6;`
		585	`UCB0BRW_L = 0x05E6;`
		586	`UCB0BRW_H = 0x05E7;`
		587	`UCB0STAT = 0x05EA;`
		588	`UCB0RXBUF = 0x05EC;`
		589	`UCB0TXBUF = 0x05EE;`
		590	`UCB0I2COA = 0x05F0;`
		591	`UCB0I2COA_L = 0x05F0;`
		592	`UCB0I2COA_H = 0x05F1;`
		593	`UCB0I2CSA = 0x05F2;`
		594	`UCB0I2CSA_L = 0x05F2;`
		595	`UCB0I2CSA_H = 0x05F3;`
		596	`UCB0ICTL = 0x05FC;`
		597	`UCB0ICTL_L = 0x05FC;`
		598	`UCB0ICTL_H = 0x05FD;`
		599	`UCB0IV = 0x05FE;`
		600	`/************************************************************`
		601	`* WATCHDOG TIMER A`
		602	`************************************************************/`
		603	`WDTCTL = 0x015C;`
		604	`WDTCTL_L = 0x015C;`
		605	`WDTCTL_H = 0x015D;`
		606	`/************************************************************`
		607	`* TLV Descriptors`
		608	`************************************************************/`
		609	`/************************************************************`
		610	`* Interrupt Vectors (offset from 0xFF80)`
		611	`************************************************************/`
		612	`/************************************************************`
		613	`* End of Modules`
		614	`************************************************************/`

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(root)/TexasInstrumentsMsp430/trunk/src/ccsv4/msp430/include/msp430f5132.cmd – Rev 2850