| 2850 |
dpurdie |
1 |
/******************************************************************************/
|
|
|
2 |
/* msp430f4132.cmd */
|
|
|
3 |
/* - Linker Command File for defintions in the header file */
|
|
|
4 |
/* Please do not change ! */
|
|
|
5 |
/* */
|
|
|
6 |
/******************************************************************************/
|
|
|
7 |
|
|
|
8 |
|
|
|
9 |
/************************************************************
|
|
|
10 |
* STANDARD BITS
|
|
|
11 |
************************************************************/
|
|
|
12 |
/************************************************************
|
|
|
13 |
* STATUS REGISTER BITS
|
|
|
14 |
************************************************************/
|
|
|
15 |
/************************************************************
|
|
|
16 |
* PERIPHERAL FILE MAP
|
|
|
17 |
************************************************************/
|
|
|
18 |
/************************************************************
|
|
|
19 |
* SPECIAL FUNCTION REGISTER ADDRESSES + CONTROL BITS
|
|
|
20 |
************************************************************/
|
|
|
21 |
IE1 = 0x0000;
|
|
|
22 |
IFG1 = 0x0002;
|
|
|
23 |
IE2 = 0x0001;
|
|
|
24 |
IFG2 = 0x0003;
|
|
|
25 |
/************************************************************
|
|
|
26 |
* ADC10
|
|
|
27 |
************************************************************/
|
|
|
28 |
ADC10DTC0 = 0x0048;
|
|
|
29 |
ADC10DTC1 = 0x0049;
|
|
|
30 |
ADC10AE0 = 0x004A;
|
|
|
31 |
ADC10AE1 = 0x004B;
|
|
|
32 |
ADC10CTL0 = 0x01B0;
|
|
|
33 |
ADC10CTL1 = 0x01B2;
|
|
|
34 |
ADC10MEM = 0x01B4;
|
|
|
35 |
ADC10SA = 0x01BC;
|
|
|
36 |
/************************************************************
|
|
|
37 |
* BASIC TIMER with Real Time Clock
|
|
|
38 |
************************************************************/
|
|
|
39 |
BTCTL = 0x0040;
|
|
|
40 |
RTCCTL = 0x0041;
|
|
|
41 |
RTCNT1 = 0x0042;
|
|
|
42 |
RTCNT2 = 0x0043;
|
|
|
43 |
RTCNT3 = 0x0044;
|
|
|
44 |
RTCNT4 = 0x0045;
|
|
|
45 |
BTCNT1 = 0x0046;
|
|
|
46 |
BTCNT2 = 0x0047;
|
|
|
47 |
RTCDAY = 0x004C;
|
|
|
48 |
RTCMON = 0x004D;
|
|
|
49 |
RTCYEARL = 0x004E;
|
|
|
50 |
RTCYEARH = 0x004F;
|
|
|
51 |
RTCTL = 0x0040;
|
|
|
52 |
RTCTIM0 = 0x0042;
|
|
|
53 |
RTCTIM1 = 0x0044;
|
|
|
54 |
BTCNT12 = 0x0046;
|
|
|
55 |
RTCDATE = 0x004C;
|
|
|
56 |
RTCYEAR = 0x004E;
|
|
|
57 |
/************************************************************
|
|
|
58 |
* Comparator A
|
|
|
59 |
************************************************************/
|
|
|
60 |
CACTL1 = 0x0059;
|
|
|
61 |
CACTL2 = 0x005A;
|
|
|
62 |
CAPD = 0x005B;
|
|
|
63 |
/*************************************************************
|
|
|
64 |
* Flash Memory
|
|
|
65 |
*************************************************************/
|
|
|
66 |
FCTL1 = 0x0128;
|
|
|
67 |
FCTL2 = 0x012A;
|
|
|
68 |
FCTL3 = 0x012C;
|
|
|
69 |
/************************************************************
|
|
|
70 |
* SYSTEM CLOCK, FLL+
|
|
|
71 |
************************************************************/
|
|
|
72 |
SCFI0 = 0x0050;
|
|
|
73 |
SCFI1 = 0x0051;
|
|
|
74 |
SCFQCTL = 0x0052;
|
|
|
75 |
FLL_CTL0 = 0x0053;
|
|
|
76 |
FLL_CTL1 = 0x0054;
|
|
|
77 |
FLL_CTL2 = 0x0055;
|
|
|
78 |
/************************************************************
|
|
|
79 |
* LCD_A
|
|
|
80 |
************************************************************/
|
|
|
81 |
LCDACTL = 0x0090;
|
|
|
82 |
LCDAPCTL0 = 0x00AC;
|
|
|
83 |
LCDAPCTL1 = 0x00AD;
|
|
|
84 |
LCDAVCTL0 = 0x00AE;
|
|
|
85 |
LCDAVCTL1 = 0x00AF;
|
|
|
86 |
LCDM1 = 0x0091;
|
|
|
87 |
LCDM2 = 0x0092;
|
|
|
88 |
LCDM3 = 0x0093;
|
|
|
89 |
LCDM4 = 0x0094;
|
|
|
90 |
LCDM5 = 0x0095;
|
|
|
91 |
LCDM6 = 0x0096;
|
|
|
92 |
LCDM7 = 0x0097;
|
|
|
93 |
LCDM8 = 0x0098;
|
|
|
94 |
LCDM9 = 0x0099;
|
|
|
95 |
LCDM10 = 0x009A;
|
|
|
96 |
LCDM11 = 0x009B;
|
|
|
97 |
LCDM12 = 0x009C;
|
|
|
98 |
LCDM13 = 0x009D;
|
|
|
99 |
LCDM14 = 0x009E;
|
|
|
100 |
LCDM15 = 0x009F;
|
|
|
101 |
LCDM16 = 0x00A0;
|
|
|
102 |
LCDM17 = 0x00A1;
|
|
|
103 |
LCDM18 = 0x00A2;
|
|
|
104 |
LCDM19 = 0x00A3;
|
|
|
105 |
LCDM20 = 0x00A4;
|
|
|
106 |
/************************************************************
|
|
|
107 |
* DIGITAL I/O Port1/2
|
|
|
108 |
************************************************************/
|
|
|
109 |
P1IN = 0x0020;
|
|
|
110 |
P1OUT = 0x0021;
|
|
|
111 |
P1DIR = 0x0022;
|
|
|
112 |
P1IFG = 0x0023;
|
|
|
113 |
P1IES = 0x0024;
|
|
|
114 |
P1IE = 0x0025;
|
|
|
115 |
P1SEL = 0x0026;
|
|
|
116 |
P2IN = 0x0028;
|
|
|
117 |
P2OUT = 0x0029;
|
|
|
118 |
P2DIR = 0x002A;
|
|
|
119 |
P2IFG = 0x002B;
|
|
|
120 |
P2IES = 0x002C;
|
|
|
121 |
P2IE = 0x002D;
|
|
|
122 |
P2SEL = 0x002E;
|
|
|
123 |
/************************************************************
|
|
|
124 |
* DIGITAL I/O Port3/4
|
|
|
125 |
************************************************************/
|
|
|
126 |
P3IN = 0x0018;
|
|
|
127 |
P3OUT = 0x0019;
|
|
|
128 |
P3DIR = 0x001A;
|
|
|
129 |
P3SEL = 0x001B;
|
|
|
130 |
P4IN = 0x001C;
|
|
|
131 |
P4OUT = 0x001D;
|
|
|
132 |
P4DIR = 0x001E;
|
|
|
133 |
P4SEL = 0x001F;
|
|
|
134 |
/************************************************************
|
|
|
135 |
* DIGITAL I/O Port5/6
|
|
|
136 |
************************************************************/
|
|
|
137 |
P5IN = 0x0030;
|
|
|
138 |
P5OUT = 0x0031;
|
|
|
139 |
P5DIR = 0x0032;
|
|
|
140 |
P5SEL = 0x0033;
|
|
|
141 |
P6IN = 0x0034;
|
|
|
142 |
P6OUT = 0x0035;
|
|
|
143 |
P6DIR = 0x0036;
|
|
|
144 |
P6SEL = 0x0037;
|
|
|
145 |
/************************************************************
|
|
|
146 |
* DIGITAL I/O Port7
|
|
|
147 |
************************************************************/
|
|
|
148 |
P7IN = 0x0038;
|
|
|
149 |
P7OUT = 0x0039;
|
|
|
150 |
P7DIR = 0x003A;
|
|
|
151 |
P7SEL = 0x003B;
|
|
|
152 |
/************************************************************
|
|
|
153 |
* Brown-Out, Supply Voltage Supervision (SVS)
|
|
|
154 |
************************************************************/
|
|
|
155 |
SVSCTL = 0x0056;
|
|
|
156 |
/************************************************************
|
|
|
157 |
* Timer0_A3
|
|
|
158 |
************************************************************/
|
|
|
159 |
TA0IV = 0x012E;
|
|
|
160 |
TA0CTL = 0x0160;
|
|
|
161 |
TA0CCTL0 = 0x0162;
|
|
|
162 |
TA0CCTL1 = 0x0164;
|
|
|
163 |
TA0CCTL2 = 0x0166;
|
|
|
164 |
TA0R = 0x0170;
|
|
|
165 |
TA0CCR0 = 0x0172;
|
|
|
166 |
TA0CCR1 = 0x0174;
|
|
|
167 |
TA0CCR2 = 0x0176;
|
|
|
168 |
/************************************************************
|
|
|
169 |
* Timer1_A5
|
|
|
170 |
************************************************************/
|
|
|
171 |
TA1IV = 0x011E;
|
|
|
172 |
TA1CTL = 0x0180;
|
|
|
173 |
TA1CCTL0 = 0x0182;
|
|
|
174 |
TA1CCTL1 = 0x0184;
|
|
|
175 |
TA1CCTL2 = 0x0186;
|
|
|
176 |
TA1CCTL3 = 0x0188;
|
|
|
177 |
TA1CCTL4 = 0x018A;
|
|
|
178 |
TA1R = 0x0190;
|
|
|
179 |
TA1CCR0 = 0x0192;
|
|
|
180 |
TA1CCR1 = 0x0194;
|
|
|
181 |
TA1CCR2 = 0x0196;
|
|
|
182 |
TA1CCR3 = 0x0198;
|
|
|
183 |
TA1CCR4 = 0x019A;
|
|
|
184 |
/************************************************************
|
|
|
185 |
* USCI
|
|
|
186 |
************************************************************/
|
|
|
187 |
UCA0CTL0 = 0x0060;
|
|
|
188 |
UCA0CTL1 = 0x0061;
|
|
|
189 |
UCA0BR0 = 0x0062;
|
|
|
190 |
UCA0BR1 = 0x0063;
|
|
|
191 |
UCA0MCTL = 0x0064;
|
|
|
192 |
UCA0STAT = 0x0065;
|
|
|
193 |
UCA0RXBUF = 0x0066;
|
|
|
194 |
UCA0TXBUF = 0x0067;
|
|
|
195 |
UCA0ABCTL = 0x005D;
|
|
|
196 |
UCA0IRTCTL = 0x005E;
|
|
|
197 |
UCA0IRRCTL = 0x005F;
|
|
|
198 |
UCB0CTL0 = 0x0068;
|
|
|
199 |
UCB0CTL1 = 0x0069;
|
|
|
200 |
UCB0BR0 = 0x006A;
|
|
|
201 |
UCB0BR1 = 0x006B;
|
|
|
202 |
UCB0I2CIE = 0x006C;
|
|
|
203 |
UCB0STAT = 0x006D;
|
|
|
204 |
UCB0RXBUF = 0x006E;
|
|
|
205 |
UCB0TXBUF = 0x006F;
|
|
|
206 |
UCB0I2COA = 0x0118;
|
|
|
207 |
UCB0I2CSA = 0x011A;
|
|
|
208 |
/************************************************************
|
|
|
209 |
* WATCHDOG TIMER
|
|
|
210 |
************************************************************/
|
|
|
211 |
WDTCTL = 0x0120;
|
|
|
212 |
/************************************************************
|
|
|
213 |
* Interrupt Vectors (offset from 0xFFE0)
|
|
|
214 |
************************************************************/
|
|
|
215 |
/************************************************************
|
|
|
216 |
* End of Modules
|
|
|
217 |
************************************************************/
|